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SIMD Math Optimization

High-performance math library using SIMD intrinsics (SSE/AVX) for game engines

C++ · SIMD · SSE · AVX · Performance · Math

High-performance math library using SIMD instructions for vector and matrix operations in game engines.

Context

School project GTech3, optimization competition, 4 weeks. Individual project.

Implementing math operations with SIMD intrinsics to achieve maximum throughput.

School Requirements

  • Implement SIMD vector operations
  • Benchmark vs scalar, minimum 4x speedup
  • x86 intrinsics (no inline asm), SSE4.2 minimum

My Implementation

Beyond the required vectors:

  • Complete hierarchy: Vec2, Vec3, Vec4, Mat4, Quaternion
  • AVX in addition to SSE: 8 floats vs 4
  • SIMD Quaternions: optimized rotations
  • Optimized data layouts: SoA support
  • Runtime dispatch: automatic CPU detection

Links

Code available on request.

SIMD Architecture

Type hierarchy with runtime dispatch:

┌─────────────────────────────────────────┐
│         Runtime CPU Detection           │
│    (SSE4.2 / AVX / AVX2 available?)     │
└──────────────┬──────────────────────────┘
               │
     ┌─────────┴─────────┐
     ▼                   ▼
┌─────────┐         ┌─────────┐
│  SSE    │         │  AVX    │
│ 128-bit │         │ 256-bit │
│ 4 floats│         │ 8 floats│
└─────────┘         └─────────┘

Tech Stack

TechVersionRole
C++17Core language
SSE4.2x86 intrinsics128-bit registers
AVX/AVX2x86 intrinsics256-bit registers
CMake3.xBuild system

Types Implemented

  • Vec2, Vec3, Vec4 (SIMD)
  • Mat4 (SIMD)
  • Quaternion (SIMD)
  • SoA (Structure of Arrays) support for batch

Optimization Techniques

  • Memory alignment (16/32 bytes)
  • Data layout SoA vs AoS
  • Cache-friendly patterns
  • Branch elimination
  • Runtime SSE/AVX dispatch

Benchmarks

OperationScalarSIMDSpeedup
Vec4 dot4 ops1 op~4x
Mat4 mul64 ops16 ops~4x
Batch transformN opsN/4 ops~4x